Intel used its stage time at the 2026 Open Compute Project (OCP) Global Summit to make a pointed claim: the company says it is the only high-volume foundry in the world currently able to supply 300mm indium phosphide (InP) silicon photonics to the broader industry at scale. The announcement, first reported by Wccftech, and confirmed in parallel coverage from TrendForce, Compound Semiconductor, and Digitimes-adjacent outlets, lands at a moment when co-packaged optics (CPO) is shifting from lab curiosity to a real line item in AI data center budgets.
The pitch is straightforward on paper and hard to execute in practice: combine indium phosphide, the material that makes efficient lasers possible, with a 300mm silicon wafer, the industry-standard substrate size that drives down manufacturing cost per chip. Most of the industry has worked with InP on smaller 150mm wafers. Intel says it has moved that process to 300mm at high volume, a jump that, if it holds up under scrutiny, would hand Intel Foundry a manufacturing advantage that rivals including Nvidia, Broadcom, TSMC, Marvell, Ayar Labs, Lightmatter, and Celestial AI would need years to replicate.
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What Intel Actually Announced at OCP 2026
According to the reporting gathered from Wccftech and TrendForce, Intel’s presentation at the OCP Global Summit centered on a technology it describes internally as “InP on 300mm Silicon.” The company says it is pairing indium phosphide laser structures with a standard 300mm-diameter silicon wafer platform rather than the smaller substrates that have defined most InP photonics manufacturing to date. Intel Foundry is the manufacturing arm tied to the capability, and the company is positioning the output for two closely related applications: near-package optics (NPO) and co-packaged optics (CPO), both aimed at high-performance computing and artificial intelligence workloads.
Nic Dubé, identified in Intel’s presentation as the company’s VP of data center systems and solutions, described silicon photonics as a “golden hammer” for the next generation of AI and HPC system architecture, a framing picked up by Compound Semiconductor’s writeup of the roadmap unveiling. The metaphor is doing real work here: Intel is arguing that optical interconnects are becoming a general-purpose fix for the bandwidth and power problems that copper wiring can no longer solve at scale, rather than a niche component bolted onto select switches.
Intel also pointed to its track record as evidence the claim is not a one-off stunt. The company says it has shipped more than 8 million photonic integrated circuits (PICs) containing more than 32 million integrated lasers since 2016, a decade-long base of deployed hardware that predates the current CPO hype cycle. That history matters to the credibility of the 300mm claim: Intel is not pitching an unproven lab demo, it is extending a production line it has run commercially for roughly ten years.
Independent outlets have not yet verified Intel’s exclusivity claim. No third party has confirmed that Intel is, in fact, the only foundry capable of 300mm InP silicon photonics at high volume, and reporting on specific technical targets, such as an energy-efficiency figure below roughly 5 picojoules per bit, remains unconfirmed by outside sources. Readers should treat the “industry’s only” framing as Intel’s own competitive positioning until a customer, analyst, or rival foundry weighs in with independent data.
Why Co-Packaged Optics Matters Now
Co-packaged optics has been a conference-circuit talking point for years, but 2026 is the year analysts say it starts showing up in procurement plans rather than just roadmap slides. The core problem CPO addresses is physical: as AI clusters scale to tens of thousands of GPUs or custom accelerators, the copper interconnects that move data between chips, racks, and switches run into both a bandwidth ceiling and a power ceiling. Electrical signals degrade over distance, and pushing more bits through copper means burning more watts just to keep the signal clean enough to read on the other end.
Moving the optical engine next to, or inside, the chip package shortens the electrical path that data has to travel before it is converted to light. Shorter electrical paths mean less signal loss and lower power overhead per bit moved, which is exactly the tradeoff AI data center operators are chasing as they try to keep power bills from growing as fast as compute demand. That is the underlying logic behind near-package optics and co-packaged optics, and it is why Nvidia’s own compute architecture roadmap has, according to TrendForce, been cited as a factor paving the way toward scale-up optical interconnects across the industry.
The market numbers behind this shift are still small in absolute terms but striking in their growth curve. TrendForce estimates the combined CPO and NPO market at roughly $100 million in 2025, a figure that sounds modest next to the broader AI infrastructure spending spree. The same research house’s longer-range forecast, however, projects that market could exceed $39 billion by 2030, an expansion of roughly 390 times over five years if the projection holds. TrendForce also estimates that CPO will represent only about 0.5% of optical transceiver modules used in AI data centers in 2026, underscoring that this remains an early-stage technology even as the dollar figures attached to its future get large.
| Metric | 2025/2026 Status | Later Forecast | Source |
|---|---|---|---|
| Combined CPO + NPO market size | ~$100 million (2025) | >$39 billion by 2030 | TrendForce |
| CPO share of AI data center optical modules | ~0.5% (2026) | Expected to rise steadily into 2027–2028 | TrendForce |
| CPO volume production timing | Begins 2026 | Large-scale procurement expected 2027–2028 | TrendForce |
| Intel PICs shipped since 2016 | More than 8 million units | Not specified | Intel (via Wccftech) |
| Integrated lasers shipped since 2016 | More than 32 million units | Not specified | Intel (via Wccftech) |
Taken together, these figures describe a technology at the very start of its commercialization curve, which is precisely why Intel’s claim to a manufacturing exclusivity edge, even an unverified one, carries weight. A company that can produce at 300mm scale when the rest of the field is still working at 150mm has a cost and volume advantage that compounds as the market scales from $100 million to tens of billions.
The 300mm vs. 150mm Manufacturing Gap
To understand why Intel is emphasizing wafer size rather than just raw photonics capability, it helps to think about how semiconductor economics actually work. A 300mm wafer has roughly four times the usable surface area of a 150mm wafer, which means a foundry running 300mm production can, in principle, produce more chips per processing run, spreading fixed manufacturing costs across a larger output. This is the same logic that drove the broader chip industry’s shift from 150mm and 200mm wafers to 300mm decades ago for standard CMOS logic. Indium phosphide photonics has lagged behind that transition because InP is a more exotic, more expensive material to work with than silicon, and scaling its processing to larger wafers while maintaining the laser quality needed for optical interconnects is a nontrivial engineering problem.
Intel’s pitch is that it has solved that scaling problem specifically for the combination that matters to AI infrastructure: InP lasers integrated onto a 300mm silicon platform. If that claim holds up as the industry gets more visibility into Intel’s actual production numbers, customers, and output figures, which remain unconfirmed in current reporting, it would mean Intel can offer photonics components at a lower cost structure than competitors still working at 150mm, simply because of wafer-level economics. That cost advantage would matter most to hyperscale AI data center operators who need millions of optical links across a single cluster, not just a handful of boutique interconnects for specialized hardware.
How the CPO Competitive Field Lines Up
The silicon photonics and CPO ecosystem is crowded, and the companies in it occupy different layers of the stack rather than competing head-to-head on identical products. Nvidia has built its own co-packaged optics ambitions around its switch and networking silicon, aiming to apply optical interconnects at the scale-up layer connecting GPUs within a cluster. Broadcom has been one of the most vocal proponents of CPO for Ethernet switching silicon, framing it as the next step after its existing high-bandwidth transceiver lineup. TSMC, as the industry’s largest pure-play foundry, has its own silicon photonics packaging initiatives aimed at supporting customers who design photonic chiplets but do not want to build their own fabs. Marvell has pursued optical interconnect IP aimed at both data center switches and custom AI accelerators. Ayar Labs, Lightmatter, and Celestial AI represent the newer generation of specialized optical interconnect startups, each pitching a different architectural approach to moving data optically between chips rather than across a traditional board-level interconnect.
Current reporting does not establish that all of these companies hold equivalent commercial CPO products or manufacturing positions today, and there is no verified, comparable revenue or shipment data across the group to rank them against Intel’s claim. What is clear is that Intel’s angle, positioning itself as a foundry-scale supplier rather than a single-product vendor, is a different competitive lane than the one most of the startups in this list are running in. Ayar Labs, Lightmatter, and Celestial AI are selling specific optical interconnect products or IP; Intel is selling manufacturing capacity to the entire industry, including, potentially, to some of those same companies as customers.
| Company | Position in CPO/Photonics Stack | Primary Angle |
|---|---|---|
| Intel | Foundry-scale InP-on-silicon manufacturer | 300mm high-volume supply to broader industry |
| Nvidia | Compute and switch silicon vendor | CPO integration for scale-up GPU interconnects |
| Broadcom | Networking/switch silicon vendor | CPO for Ethernet switching hardware |
| TSMC | Pure-play foundry | Photonics packaging support for fabless customers |
| Marvell | Interconnect IP vendor | Optical IP for switches and custom accelerators |
| Ayar Labs | Specialized optical interconnect startup | Chiplet-based optical I/O products |
| Lightmatter | Specialized optical interconnect startup | Photonic compute and interconnect fabric |
| Celestial AI | Specialized optical interconnect startup | Optical memory fabric architecture |
The caveat worth repeating is that this table describes strategic positioning drawn from available reporting, not a verified head-to-head ranking. No outlet in the current coverage has published comparable revenue, shipment volume, or market-share figures across all eight companies, so none of this should be read as Intel having objectively “beaten” these rivals. It is a map of where each player sits, not a scoreboard.
The Historical Arc: From Transceivers to Co-Packaged Optics
Silicon photonics has a longer history inside Intel than most of the current CPO coverage acknowledges. Intel’s optical interconnect business traces back to pluggable transceiver modules the company began shipping commercially around 2016, long before “AI data center” was a standard industry phrase. Those early products used discrete optical transceivers plugged into the front panel of network switches, physically separate from the compute and switching silicon they served. That architecture worked fine when bandwidth requirements were modest, but it put real distance, and therefore real signal loss and power overhead, between the electrical and optical domains.
The industry’s shift toward near-package optics and then co-packaged optics represents a progressive closing of that distance. NPO moves the optical engine onto the same board or substrate as the switch silicon, cutting the electrical trace length significantly compared to a front-panel pluggable. CPO goes further, integrating the optical engine directly into the chip package alongside the compute or switch die itself, shrinking the electrical path to the shortest distance physically possible. Each step in that progression has required new manufacturing techniques, which is exactly the gap Intel’s 300mm InP claim is aimed at closing on the laser and photonics-material side of the equation.
This history also explains why TrendForce’s research frames 2026 to 2028 as the critical commercialization window rather than treating CPO as something that just appeared out of nowhere. The underlying architectural idea of moving optics closer to compute has been building for close to a decade; what changed in 2025 and 2026 is that AI data center power and bandwidth demands finally made the economics of CPO adoption make sense for hyperscale buyers, not just research labs.
Intel Foundry’s Stake in the Photonics Bet
The 300mm InP claim doesn’t exist in a vacuum inside Intel either. It arrives while Intel Foundry is trying to rebuild its reputation as a manufacturing partner for outside customers, not just a captive supplier for Intel’s own CPU and GPU designs. A credible, differentiated photonics capability gives the foundry business a pitch that doesn’t require going toe-to-toe with TSMC on leading-edge logic nodes, where TSMC’s scale and yield advantages remain difficult to match. Instead, Intel can offer a specialized manufacturing service that, if the volume claims hold up, few others can match at the same wafer size.
That framing also helps explain why Intel chose the OCP Global Summit as the venue for this announcement rather than a product launch event. OCP’s membership includes the hyperscale data center operators and switch vendors who would actually need to buy into a 300mm InP photonics supply chain. A reported writeup from XenoSpectrum covering Intel’s optical interconnect vision for AI chip systems frames the announcement explicitly around system-level integration, not a standalone component sale, reinforcing that Intel is trying to sell a platform story to exactly the audience in that room.
Market Impact: What This Means for AI Infrastructure Spending
The timing of Intel’s announcement is not incidental. AI data center operators are in the middle of a spending cycle that has already pushed memory prices sharply higher, a dynamic this site has covered in detail around DDR5 pricing pressure tied to AI demand, and that same bandwidth-hungry, power-constrained build-out is the backdrop for why optical interconnects matter now rather than five years from now. When Nvidia’s Vera CPU platform claims a doubling of AI processing speed in cloud deployments, the networking fabric connecting those chips becomes the next bottleneck operators have to solve. CPO is one of the few technologies on the table that addresses that bottleneck at the physical layer rather than through software optimization.
If Intel’s 300mm InP manufacturing claim proves durable under industry scrutiny, it positions Intel Foundry as a supplier that hyperscalers and switch vendors alike could depend on for photonics components, adding a new revenue category to a foundry business that has spent the last several years trying to prove it can compete with TSMC on logic manufacturing. TSMC’s own record quarter, driven heavily by AI chip demand, already shows how lucrative being the preferred supplier to the AI buildout can be. A credible foundry-scale photonics offering would give Intel a toehold in a market TrendForce expects to grow from roughly $100 million to more than $39 billion in five years, even if Intel’s share of that eventual market is far from guaranteed.
There is a flip side worth noting. AI infrastructure spending is not infinite, and every dollar a hyperscaler commits to optical interconnect hardware is a dollar not spent on GPUs, HBM4 memory, or data center power contracts. Samsung’s push into 3nm production for Nvidia’s NVHBM memory chips and Micron’s reported sales jump ahead of HBM4 demand both point to a buildout where compute and memory have so far captured most of the budget attention. Co-packaged optics entering serious procurement conversations in 2027 and 2028, as TrendForce projects, means networking and interconnect hardware is about to compete more directly for a slice of that same AI capital expenditure pool.
What Intel’s Claim Does and Doesn’t Prove
It is worth being precise about the boundaries of what has actually been reported, because “industry’s only” is a strong phrase and the surrounding details matter. Intel’s statement that it is the only high-volume foundry capable of supplying 300mm InP silicon photonics to the broader industry at scale is, as of this reporting, a claim made by Intel at its own presentation, not an independently audited fact. No third-party analyst firm, customer, or competing foundry has publicly confirmed or disputed the exclusivity of that capability in the coverage gathered so far.
Similarly, a reported energy-efficiency target below approximately 5 picojoules per bit appears in some coverage of Intel’s roadmap, but this figure should be read as a stated target rather than a verified, audited production specification. Reports that Intel has completed mass production of 300mm InP-on-silicon photonic wafers also remain unconfirmed by independent sources at this stage; the strongest verified elements of the story are the OCP Global Summit presentation itself, Intel’s stated manufacturing approach, and the company’s long-standing photonics shipment history dating back to 2016. Readers evaluating Intel’s competitive position should weigh the claim accordingly: plausible given Intel’s decade of photonics manufacturing experience, but not yet independently validated.
Predictions: Where Co-Packaged Optics Goes From Here
- Expect rival foundries and photonics specialists, including TSMC and the startup cohort of Ayar Labs, Lightmatter, and Celestial AI, to respond with their own wafer-scale manufacturing announcements over the next two to four quarters, since ceding a foundry-scale narrative to Intel unanswered would be a competitive risk for all of them.
- TrendForce’s 2026-to-2028 window for large-scale CPO procurement will likely become the industry’s de facto benchmark for when hyperscalers move from pilot deployments to production orders, making 2027 the year to watch for the first major customer disclosures.
- Nvidia’s own scale-up optical interconnect roadmap will keep shaping demand on the compute side, meaning Intel’s manufacturing capacity will matter most if it can secure design wins tied to next-generation GPU and switch platforms rather than legacy networking gear.
- Given how small the 0.5% CPO penetration figure for 2026 is, expect continued skepticism from data center operators until independent benchmarks validate real-world power savings versus traditional pluggable optics at scale.
- Intel Foundry’s broader turnaround narrative, already leaning on AI chip manufacturing ambitions, will likely fold this photonics claim into its pitch to external customers as evidence the foundry business has differentiated capabilities beyond standard logic nodes.
How This Fits Into the Broader AI Hardware Picture
Co-packaged optics does not exist in isolation. It sits alongside a cluster of AI infrastructure stories that have defined 2026: memory suppliers racing to keep up with HBM4 demand, foundries repositioning around AI chip manufacturing, and cloud providers negotiating GPU pricing that increasingly determines who can afford to train and serve frontier models. Micron‘s reported sales jump ahead of HBM4 demand and Samsung’s move to tap TSMC’s 3nm process for Nvidia’s NVHBM memory chips both reflect the same underlying pressure that is pushing CPO forward: AI workloads need more bandwidth, delivered with less power overhead, than the previous generation of data center hardware was built to provide.
Pricing dynamics across the stack reinforce how tight the AI hardware market has become. Cloud GPU pricing gaps between AWS, Azure, and Google Cloud, DDR5 memory prices climbing as AI demand eats into supply, and Intel’s own CPU price increases earlier this year all point to a hardware ecosystem where every layer, from compute to memory to now interconnects, is seeing price and capacity pressure simultaneously. A functioning, cost-effective CPO supply chain would not solve that pressure on its own, but it addresses one of the few remaining technical bottlenecks that software optimization alone cannot fix: the physical limits of moving data electrically between chips at the scale modern AI clusters now require.
What to Watch Next From Intel and Its Rivals
The next real test of Intel’s claim will come from outside Intel’s own presentations. Analyst firms that track foundry capacity, including TrendForce, are likely to publish independent assessments of Intel’s actual 300mm InP output over the coming quarters, which would either support or undercut the “industry’s only” framing. Customer disclosures matter even more: if a major switch vendor, hyperscaler, or GPU maker names Intel as a qualified photonics supplier for a shipping product, that would be a far stronger signal than the OCP presentation alone. Conversely, if rivals such as TSMC or the optical interconnect startups announce comparable 300mm wafer capability in the coming year, Intel’s exclusivity claim would need to be retired quickly.
Investors and infrastructure buyers watching the AI hardware space should treat this announcement as an early marker in a multi-year competitive race rather than a settled outcome. The dollar figures TrendForce has attached to the CPO and NPO market, from roughly $100 million in 2025 to a projected $39 billion by 2030, make clear why foundries and chipmakers are positioning now even though actual deployment remains in single-digit percentage territory of the broader optical transceiver market.
Frequently Asked Questions
What did Intel actually announce at the 2026 OCP Global Summit?
Intel said it is currently the only high-volume foundry capable of supplying 300mm indium phosphide (InP) silicon photonics to the broader industry at scale, a technology aimed at near-package optics and co-packaged optics for AI and HPC systems.
What is co-packaged optics (CPO) and why does it matter for AI data centers?
CPO integrates optical interconnect components directly into a chip’s package, shortening the electrical signal path between chips. This reduces power consumption and signal loss compared to traditional pluggable optical transceivers, which matters as AI data centers scale to tens of thousands of interconnected chips.
How big is the CPO and NPO market right now?
TrendForce estimates the combined CPO and NPO market at roughly $100 million in 2025, with projections suggesting it could exceed $39 billion by 2030 as AI data center adoption accelerates.
Has Intel’s “industry’s only” claim been independently verified?
No. As of this reporting, Intel’s claim of exclusive high-volume 300mm InP silicon photonics capability has not been independently confirmed by a third party, analyst firm, or competing foundry.
Who are Intel’s main competitors in silicon photonics and CPO?
Reports name Nvidia, Broadcom, TSMC, Marvell, Ayar Labs, Lightmatter, and Celestial AI as participants in the broader CPO and silicon photonics ecosystem, though available reporting does not establish equivalent commercial products or manufacturing positions across all of them.
When will CPO see large-scale adoption in AI data centers?
TrendForce expects CPO volume production to begin in 2026, with large-scale procurement by hyperscale data center operators more likely in 2027 and 2028.
What does “InP on 300mm Silicon” actually mean?
It refers to manufacturing indium phosphide laser structures on a standard 300mm-diameter silicon wafer platform, rather than the smaller 150mm substrates more commonly used for InP photonics, allowing for higher production volume and potentially lower per-unit cost.
How long has Intel been making silicon photonics components?
Intel says it has shipped more than 8 million photonic integrated circuits containing more than 32 million integrated lasers since 2016, giving the company roughly a decade of commercial photonics manufacturing experience ahead of this 300mm claim.
