TOM write-only/unmapped register reads: $F000E2 should return MEMCON1 #1045

Report

42bs reports that the first hex value (MEMCON1) and second ($F000E2 / INT2) should both be $1865. Supplies demo_M.j64 and demo.S. The report was corrected from RO to WO.

Source: https://forums.atariage.com/topic/393772-virtual-jaguar-desktop-app-windowslinuxmacos-%E2%80%94-dev-tools-overclocking-jaguar-cd-modem-netplay-cheats-achievements-and-obscure-hardware/?do=findComment&comment=5906773

Initial investigation

Current TOM fallback reads backing RAM for write-only/unmapped registers. Establish the hardware read decode and MEMCON1 fallback from primary sources, including byte lanes and readable RAM/register exceptions.

Status: reported; reproduction and root-cause verification in progress. Do not treat a suspected mechanism as confirmed.

Acceptance criteria

Add byte/word/long readback regressions for INT2 and representative unmapped/write-only addresses; preserve readable registers, CLUT, line buffers, GPU and blitter dispatch.

Confirmed root cause and local validation

Original jag_sim/netlists/tom/IODEC.NET Float1-5 selects MEMCON1 when no readable target drives the bus. TOM had instead returned backing RAM, including for INT2.

Byte/word/long regressions cover INT2, video write-only registers, unmapped addresses and changing MEMCON1, while checking MEMCON2 and CLUT remain readable. All pass after the patch and failed before it. Internal video/audio timing now uses register accessors rather than bus reads of VP/VI. Tests that verify video writes inspect the backing latch; bus read behavior is covered separately.

The supplied demo runs in RetroArch with Model M BIOS; both displayed register values are $1865.

Draft implementation/test PR: #1047