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[sysvabi] Make hard-float a requirement for sysvabi - #233
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| Procedure call standard requirements | ||
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| The AArch64 System V ABI uses The Base Procedure Call Standard from (AAPCS64_). |
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There are some other ABI variations mentioned in the The standard variants section of AAPCS64 (fp16 format, sizes of some types), should we mention any of them here too? I think it would be enough to say that the LP64 data model must be used, maybe with an option to use ILP32.
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I'll have a think. I am a little worried that the statement is a bit too strong, and could rule out things like the vector PCS.
The opening paragraph of https://github.com/ARM-software/abi-aa/blob/main/aapcs64/aapcs64.rst#6the-base-procedure-call-standard has:
Application code is expected to conform to one of three data models defined in this standard; ILP32, LP64 or LLP64.
I think that is something close to what I want to say, without duplicating the text exactly. Perhaps I can find a way of referencing it more directly.
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This adds support for the AArch64 soft-float ABI. The specification for this ABI was added by ARM-software/abi-aa#232. Because all existing AArch64 hardware has floating-point hardware, we expect this to be a niche option, only used for embedded systems on R-profile systems. We are going to document that SysV-like systems should only ever use the base (hard-float) PCS variant: ARM-software/abi-aa#233. For that reason, I've not added an option to select the ABI independently of the FPU hardware, instead the new ABI is enabled iff the target architecture does not have an FPU. For testing, I have run this through an ABI fuzzer, but since this is the first implementation it can only test for internal consistency (callers and callees agree on the PCS), not for conformance to the ABI spec.
The aapcs64 base procedure call standard requires floating point and simd registers. With the advent of a soft-float ABI for R-profile CPUs without floating point, we are making it explicit that platforms based on the System V ABI are required to use the base procedure call standard.
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Rebased with to resolve conflict with version history. |
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This adds support for the AArch64 soft-float ABI. The specification for this ABI was added by ARM-software/abi-aa#232. Because all existing AArch64 hardware has floating-point hardware, we expect this to be a niche option, only used for embedded systems on R-profile systems. We are going to document that SysV-like systems should only ever use the base (hard-float) PCS variant: ARM-software/abi-aa#233. For that reason, I've not added an option to select the ABI independently of the FPU hardware, instead the new ABI is enabled iff the target architecture does not have an FPU. For testing, I have run this through an ABI fuzzer, but since this is the first implementation it can only test for internal consistency (callers and callees agree on the PCS), not for conformance to the ABI spec.
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The aapcs64 base procedure call standard requires floating point and simd registers. With the advent of a soft-float ABI for R-profile CPUs without floating point, we are making it explicit that platforms based on the System V ABI are required to use the base procedure call standard.
Soft-float pull request in #232